RE: Re: [oc] Real newbie questions

["Ho, Wen Jei x4297" <who1@rockwellcollins.com>]

Some people even use board level schematic net list as testbench.

Wen

		-----Original Message-----
		From: owner-cores@opencores.org@ROCKWELLCOLLINS On Behalf Of
John Sheahan <jrsheahan@optushome.com.au>
		Sent: Saturday, January 25, 2003 3:10 PM
		To: cores@opencores.org
		Subject: Re: Re: [oc] Real newbie questions

		On Sat, Jan 25, 2003 at 02:35:46PM -0000, tanveer  tan
wrote:
		> !!! r there any syntheesizable testbenches??
		>
		>
		> tanveer

		Sure.
		I worked  with quickturn emulators a while back.
		These are either arrays of FPGA's with software to spread
		out the design, or arrays of dedicated special tiny CPUs.

		They are there to simulate a big design fast.
		(close to real time)

		Here, the simulator running the testbench is the bottleneck.
		Using a synthesizeable testbench, together with RAM is one
solution.

		Its perhaps possible to argue an IC tester is another
example.
		john
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