Re: [oc] New! FFT core

[sradio@opencores.org]

For circuit simplification, the CFFT output order is not bit reversed but 
radix 4 reverse ordered. For example,

c is the signal of output step counter,
a is the signal of output order,
If the CFFT is 1024 points,

a(9 downto 0)<=c(1 downto 0)&c(3 downto 2)&c(5 downto 4)&c(7 
downto 6)&c(9 downto 8);

(:



----- Original Message ----- 
From: John Dalton <john.dalton@b... > 
To: cores@o...  
Date: Mon, 18 Nov 2002 03:00:52 +1100 
Subject: Re: [oc] New! FFT core 

> 
> 
> > After me, may be John can can do a final round of editing ? 
> ;*) 
> 
> Did someone say my name?  Does 'John' refer to me? 
> 
> If so, I don't mind doing an edit.  My FFT core has been at a stand 
> still 
> for ages now, so if I can make a contribution by doing some 
> editing, I'm glad to. 
> 
> A corrected version of the text from the document cfft/cfft_e.pdf 
> is appended to this email. 
> 
> Regards 
> John 
> 
> -------------------- 
> 
> 1. Description 
> 
> CFFT is a radix-4 fast Fourier transform (FFT) core with 
> configurable data width and 
> a configurable number of sample points in the FFT. 
> 
> Twiddle factors are implemented using the CORDIC algorithm, 
causing 
> the gain of the 
> CFFT core to be different from the standard FFT algorithm.  This 
> variation in gain 
> is not important for orthogonal frequency division modulation 
> (OFDM) and demodulation. 
> The gain can be corrected, to that of a conventional FFT, by 
> applying a constant 
> multiplying factor.  The input to the FFT is naturally ordered 
> {editor's note: have I 
> interpreted this correctly?} while the output of the FFT is bit 
> reversed, 
> 
> 2.  Theory of Operation 
> 
> The reader is referred to one of the many explanations given in 
> common textbooks. 
> {editor's note: provide reference} 
> 
> 3. Block Diagram 
> 
> 4. Timing 
> 
> 5. Miscellaneous 
> 
> a. Gain 
> 
>    Points   Standard FFT  CFFT      Standard IFFT  CFFT(inverse) 
>    256      1             0.0698    1/256          17.9 
>    1024     1             0.0287    1/1024         29.4 
>    4096     1             0.0118    1/4096         48.2742 
> 
> b. Output Order 
> 
>    The output sequence is bit reversed.  For example, the 789th 
> (1100010101(base 2)) output 
>    of a 1024 point FFT corresponds to a normalised frequency of 
> 675/1024 (1010100011(base 2)). 
> 
> c. Synthesis 
> 
>    This core can be synthesized using Synplify70.  It can be placed 
> and routed using Xilinx ISE4.1. 
>    A 1024 point FFT, with a 12 bit I/Q input can be fitted into an 
> XCV50E-6 and runs at a 
>    clock speed of 90MHz. 
> 
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