Re: [oc] PUSH/POP Instructions on RISC?

["Jim Dempsey" <tapedisk@ameritech.net>]

RISC has as a design chriteria to reduce the instruction set (to reduce die
size
and improve performance of what remains) as a trade off against program
size.
Since external RAM is relatively slow you can usualy perform the incriment
or
decriment during the wait cycle for the memory. Also, since much of the
coding
now is done using a C type compiler the PUSH/POP as a compiler statement
can generate the necessary instruction sequences. Or, if you don't have a C
compiler you most likely have macro capabilities in your assembler. The
PUSH/POP can be defined as a macro.

Also, in addition to adjusting the stack pointer you may be able to insert
additional instructions as well. Think of this as the pipeline being
located outside the processor and in your code.

Jim Dempsey

----- Original Message -----
From: "Ali Mashtizadeh" <ali@alikat.org>
To: <cores@opencores.org>
Sent: Monday, June 10, 2002 4:11 PM
Subject: [oc] PUSH/POP Instructions on RISC?


> Why are the push/pop instructions never found on risc processors? If a
> processor has two write backs to the register file it doesn't need that
> much more hardware to do post/pre-increment/decrement memory reference
> instructions. Is there a special reason for not having these
> instructions? It's simpler than a scaled memory reference reg+c*reg.
>
> Ali
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