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[oc] Rambus Memory Controller
Hi everybody there..
Does anyone have the complete specifications for Rambus Memory
Controller? All I am getting after lots of browsing is preliminary
information about the RMC which is not sufficient to design one, its
mainly a high-level document with no clear defined functioning of the
RMC. There are many conflicting things in the document (or at least I
found them conflicting with RAC datasheet). Can anyone help me out to
obtain the advanced version of the RMC? I am very much in need of it.
Thanks all!
Warm regards,
Arch
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