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[oc] Re: ARM core



hi,

It's a good idea to make scARM compliant with WISHBONE.
I've read the spcefication of WISHBONE, but I am afraid it is too long to be
familiar with it
in short time. Could you please shed any light on it ? or how can I make
scARM compliant with WISHBONE?

I've uploaded the initial version of scARM in CVS. it's ugly but works.

The aim of the scARM project is to create a free, open source ARM core
available under the GNU (L)GPL license. Platform must be versatile to fit
various target applications.
The core is modeling with SystemC language, a system level desciption
language. It is based on a DLX-like five stage pipeline architecture.
I hope the design can become a seed which bring up many useful SystemC
models.

tao
--
University of Electronic Science and Technology  in China
+86-28-3202346
+86-0139-8068-9358
http://www.opencores.org/people/zhong


-----Original Message-----
~{7"<~HK~}: Shawn Tan <shawn.tan@aeste.net>
~{JU<~HK~}: cores@opencores.org <cores@opencores.org>
~{HUFZ~}: 2002~{Dj~}4~{TB~}4~{HU~} 21:11
~{VwLb~}: Re: [oc] Re: ARM core


>Oh, Zhong..
>
>If it can be made to be WISHBONE compliant.. imagine how it can directly
>interface to all the other OpenCores.. SoC systems will be easier to
>design than ever.. I've been working on a preliminary ARM-WB bridge and
>it is partially done.. but if your one works, that'll be cool..
>
>With Metta,
>Shawn Tan.


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