Re: [oc] Output loading in digital circuit

[Steve Wilson <stevew@intrinsix.com>]

I would have to see the application notes for the device to hazard a guess.   What circuit in
particular are you seeing this on?

Steve Wilson

Kenneth Hung wrote:

> Hi Steve
>
> Ur answer might be correct in some sense in pF.
> But do u know why there's an R=500 or R=1kohm in parallel
> with the C ? I can't see no relation why there's a R and why is such
> value ? For a typical transmission line, even the termination resistor
> is 50ohm.
>
> ----- Original Message -----
> From: "Steve Wilson" <stevew@intrinsix.com>
> To: <cores@opencores.org>
> Sent: Tuesday, April 02, 2002 4:19 AM
> Subject: Re: [oc] Output loading in digital circuit
>
> > Let me try my hand at this - having designed boards in a past life.
> >
> > One thing you might be seeing is the "test circuit" that was used to
> actually measure (or spice if
> > you like) the timing numbers represented in the device data sheet.   They
> have to quote something,
> > so usually represent what that something is relative too.
> > This allows you to scale your numbers if necessary OR use it as an
> absolute load number you don't
> > want to exceed in your own design.  Example: The test circuit had 50pf in
> it.  My design has 20 pf
> > of load estimated on the board between the I/O's and board trace.  I'm
> under their 50 pf number,
> > so I should see the worst-case delay or better guaranteed.
> >
> > Does this help any?
> >
> > Steve
> >
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