[oc] Low power design

[Jamil Khatib <khatib@ieee.org>]

In my bluetooth core design I have to support low power operation modes.

Is there any suggestion for low power design?

In bluetooth some internal blocks such as (Tx & Rx data path) can be
disabled. Is it recommended to use gated clocks? In FPGA gated clocks
produces consume large hardware resources.

Do you have any recommendation for me?

Note: system clock is less than 20MHz

Thanks
--
   Jamil Khatib
OpenCores Organization
http://www.opencores.org




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