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Re: [oc] C to HDL? Didn't realise the situation was that bad
I fully agree with your statements. But you miss some important points.
Or better the gcc tool chain misses some important point: waveforms and
advanced synthesis. Think about how to synthesize a big statemachine.
I am sure gcc can be used to do this task (at least at a primitive level).
But a lot of companies are making big bucks with their synthesis tools,
each with their own specialized algorithms. Maybe there are some bright
guys out there who can do the same with gcc ???
>I've never really understood why HDLs
>(VHDL, Verilog, SystemC, ...) get treated
>as 'special' languages. They have their own
>simulators, generators, synthesisers and
>so on.
>
>At the highest level of abstraction, an HDL
>is just a regular programming language with
>native support for simultaneous execution.
>
>eg. what's the difference between VHDL and C/C++?
>Concept of bits: 'bit' maps to 'boolean'
>Concept of simultaneity: 'process' map to 'thread'
>Concept of time: 'wait' maps to the 'time()' (modified to
>take a float so it handles nanosecond resolution)'
>
>Gcc/glib supports all these things. Why not extend
>gcc to support VHDL and Verilog? 'FPGA' simply
>becomes another target architecture, with the
>instruction set being the set of functions a logic
>block can implement.
>
>In this way, gcc replaces a synthesiser.
>Gdb replaces the simulator. HDLs
>and 'traditional' programming languages
>become interchangeable.
>
>Yes, this is a very simplistic view, but I can't
>see too much wrong with the big picture.
>(Please point out any errors!)
>When doing the VHDL writing aspect of
>my job, I often ask myself, "What makes
>me different to a computer programmer"?
>Increasingly the answer is "not much".
>
>As I see it, the lack of a free design flow is the
>main reason writing HDL has not been merged
>with everyday programming. It's probably also
>an historical artifact due to the way people have
>been trained to think.
>
>Best wishes
>John
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