Re: [oc] High speed serial comms links

["Dave Feustel" <dfeustel@mindspring.com>]

Xilinx Virtex-II chips support LVDS directly and AMD hypertransport protocol as well.
Are you looking for a more general (chipwise) solution?

----- Original Message -----
From: "Carl van Schaik" <carl@openfuel.com>
To: <cores@opencores.org>
Sent: Sunday, August 05, 2001 11:17 AM
Subject: [oc] High speed serial comms links


> Hi
>
> I have a board design with 4 LVDS transmit and 4LVDS recieve pairs and I'm
> looking to
> get a high speed comms system to run across it.
>
> I want to use 2TX and 2RX lines, I have two RJ45 connectors
> with 2TX and 2RX pairs each.
>
> I have already tested the recievers and transmitters by sending a 266MHz
> clock
> (533MBits/s theoretical max data rate) over
> a piece of CAT-5 cable and verified its reception.
> I now want to design a high speed serializer/deserializer over 2 LVDS
> channels (single direction)
>
> I'm a bit at a loss as to the best way to do this...
>
> Sending Clock and Frame data requires two channels alone in synchronous
> comms.
>
> I'll be wanting a way to embedd the clock, data and frame over the 2 signals
> in a way
> to maximise the bandwidth.
> The comms will be eventually implmented between two separate boards that
> don't have
> synchronised clocks so the design must cater for this.
>
> any input would be great.
>
> Hey, if it works out, it could become anouther opencores core.
>
> thanks
> Carl van Schaik
> --
> OpenFuel Pty Ltd.
>
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