Re: [oc] Testing Implemented Design in FPGA

[Victor the Cleaner <jonathan@canuck.com>]

On Mon, Jun 11, 2001 at 07:59:13AM +0200, Richard Herveille wrote:
> >
> >I haven't used the Chipscope, so I don't know if the cores have Xilinx 
> >macros. ( but from a business standpoint, it would make more sense to 
> >Xilinx to make the cores Xilinx-specific.) One thing is sure is that the 
> >probes are not inserted after PAR. By the way, Xilinx sells the cores for 
> >$495 and $895 with MultiLINX cable.
> 
> Anybody interested in the schematics for the cable ?? It is as simple as 
> Altera's ByteBlaster (MV) :-).

Are you sure you're talking about the Multilinx cable?  The Parallel III
cable is pretty simple, but the Multilinx is USB, which by itself adds
some complexity.

Jonathan

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