Re: [oc] multiplier

["Yoshiaki" <sysworks@saitama-j.or.jp>]

  I'm not sure if  I could be a proper person to reply to your msg, but
I think it depends on what your demand and resorces.

----
 Might be simply understood if you break down your *word*
into each a bit , you will see something small implementation
of your multiplier using single full-adder.
 This is realistic for some case of I-Q Symbol(QPSK) recovery 
chip as clock to Symbol rate is, into BaseBand, so high(say neary 
1000 or more).

 If you combine those bits into ..say nibble, you might find
LUT methodologies much preferable with somewhat much neat
consideration of Target device resources. You might be able to
implement them into partial ROMs for much efficiency.

  This is realistic also for some mid-range symbol-to-clock rate 
communication logics, so far as from my old experiences.

 If your demand requests much higher performance in speed, then 
you will implement them all in parallel and in pipe-lined forms as
you have decrared in original post. 

 All depends on your demand and on your resouces obtainable.

----
 I'm afraid you are capable enough and do not need such basic
ideas, but,  If you have got many math to go with, how about to
check if CORDIC(a family of shift and add algorithms) are 
preferable for your case.

 In this case, I would like to recommend fundamentals like
B.Parhami's  
"Computer Arithmetic algorithms and hardware designs" 
 isbn 0-19-512583-5.
and(yes *AND*)
J.Michel Muller's
"Elementary Functions  algorithms and Imprementation"
isbn 0-8176-3990-X

 Above two are really good book to spend one's days, I believe.
(I really don't know if this could be your case or not.)

Other ref-book for actual implementation could be something
closely related to VHDL or VerilogHDL .
( I'm not familier with verilogHDL because the ONLY verilog 
compiler acceptable to ASIC manufacture's  had been VerilogXL 
, which costs too much for my small company,for long days.)
So I can just say something only about VHDL.

Ashenden's "Designers guide to VHDL" is famus to be a good 
intro but I'm afraid it will not go long way with you  though I like 
this one.
----
 Bhasker's "A VHDL synthesis primer" looks to be a kind 
introductionary one, but I can recommend this  JUST FOR 
quick starting ONLY.

If you are young now and rich in tutorial days,  I would like to 
recommend actual trials in *both* sim and its synth modelings 
in VHDL. 
( You can obtain many sim/synth tools in really cheap cost than
 before or even free for some period of experimentaions of them. )

 Confirming your synth model in Altera or Xilinx FPGA fitter, you 
will find out some VHDL authoritie's book tends misleading his 
readers.

We all have long ways to go.
good luck

P.S  
In case if you have any interest on Bit-serial mult synth model, I can
show you some document and code for fixed point signed in japanese
font pdf.

---- Yoshiaki Naruse ---- 
  http://www.saitama-j.or.jp/~sysworks  
( Sorry for Japanes font only) 
>