Re: [oc] Ethernet Mac

[Victor the Cleaner <jonathan@canuck.com>]

On Wed, Mar 29, 2000 at 10:10:52AM -0500, Jason Abele wrote:
> 
> As for tools, any suggestions/comments on the usefulness of Alliance,
> SAVANT, and FreeHDL, aside from the fact that none of them can
> synthesize to Xilinx bitstreams? (my computer setup does not include M$
> products anymore than absolutely necessary)

Uh, "what?"  The above is semi-accurate and suggests you don't 
understand these toolchains.  I don't know anything about SAVANT or 
FreeHDL, but it stands to reason that they output a standard netlist 
(probably EDIF) and nothing more.  Alliance isn't a compiler - it's 
the back-end place-and-route (PAR), bitstream generator, and other
device-specific tools for supporting their parts STARTING with the
netlist.  So you actually need BOTH if you want to avoid the windoze
Foundation tools, which include everything from the Aldec front end
and simulator through the Synopsys compiler to the Xilinx PAR, FPGA
Editor, bitstream generator, JTAG interface, etc.

As someone who's making the shift from the pissy-based system to my
workstation, I've had to learn about the bitter reality of these
things.  (Unix) workstation support isn't as good as it should be for
any of this stuff; Alliance, for example, is only supported on Solaris
and HPUX (in addition to windoze, of course).  As we're a big Silicon
Graphics shop here, I'd kill for IRIX support.  That ain't how it is, 
so I'm moving to the HP.

It should also be noted by those who are less-than-infatuated with
micro$oft that the Xilinx Parallel Download Cable, which supports both
serial and JTAG configuration, is absolutely the cheapest way to get
the bitstream into the part.  It's something like $75 (free with some
of the software kits) and runs *only* on the pissy.  If you want to 
use a workstation, you need a serial cable, and that's going to set you 
back something more along the lines of $250 (for the serial (Xchecker?) 
cable) to $500 (for the new Multilinx, which also will talk to a USB, 
and looks like a pretty damn trick thing when used with Xilinx's new 
logic analyzer cores).

Jonathan