Xilinx Design Summary

head 1.1; branch 1.1.1; access ; symbols initial:1.1.1.1 diogenes:1.1.1; locks ; strict; comment @# @; 1.1 date 2008.01.16.19.01.34; author fellnhofer; state Exp; branches 1.1.1.1; next ; commitid 122547a751ef4567; 1.1.1.1 date 2008.01.16.19.01.34; author fellnhofer; state Exp; branches ; next ; commitid 122547a751ef4567; desc @@ 1.1 log @Initial revision @ text @Xilinx Design Summary

RS232 Project Status
Project File:	rs232.ise	Current State:	Synthesized
Module Name:	sio	Errors:	10 Errors
Target Device:	xc3s500e-5fg320	Warnings:	2 Warnings
Product Version:	ISE 9.2i	Updated:	Tue Nov 13 19:20:53 2007

RS232 Partition Summary
No partition information was found.

Detailed Reports
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report	Current	Tue Nov 13 19:20:52 2007	10 Errors	2 Warnings	0
Translation Report	Out of Date	Tue Nov 13 12:05:34 2007	0	2 Warnings	0
Map Report	Out of Date	Tue Nov 13 12:05:44 2007	0	2 Warnings	4 Infos
Place and Route Report	Out of Date	Tue Nov 13 12:06:01 2007	0	0	0
Static Timing Report	Out of Date	Tue Nov 13 12:06:05 2007	0	0	2 Infos
Bitgen Report	Out of Date	Tue Nov 13 12:06:14 2007	0	0	0

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