Project Name:

SoC/OpenRISC Development Interface

(See change Log at bottom of page for changes/updates)

Description

Development Interface is used for development purposes (Boundary Scan testing and debugging). It is an interface between the RISC, peripheral cores and any commercial debugger/emulator or BS testing device. The external debugger or BS tester connects to the core via JTAG port that is fully IEEE 1149.1 compatible. The Development Port also contains a trace buffer with support for tracing the program flow, execution coverage and profiling the code…

Status

• All files are updated [Oct. 15, 2001]
• Boundary Scan is also supported. BS chain of the chip where Debug Interface is used, must be defined prior to its use.
• Specification is finished (just minor changes (bug fixes are expected): DbgSupp.pdf (about 145 KB)

Downloading

To get a snapshot of the latest release, please go to CVSget (from main OpenCores web page) and enter "dbg_interface" as Module Name (without quotes). This will create a gzip'ed tar file of the entire Debug Interface core (about 185K). The documentation will also be included. Please follow the link above to download it.

Author / Maintainer

Igor Mohor

mailto:igorm@opencores.org

Feel free to send me comments, suggestions and bug reports.

Change Log

• 18/5/2001 IM Initial web page + first check-in
• 23/5/2001 IM Documentation updated
• 13/9/2001 IM Documentation and code updated
• 20/9/2001 IM Documentation and code updated
• 15/10/2001 IM Documentation and code updated (final release)