Re: [usb] USB2.0 FPGA implementation

[Rudolf Usselmann <rudi@asics.ws>]

On Mon, 2003-04-28 at 17:40, leo.jarillas@eazix.com wrote:
> Mr. Usselman,
>   Hi.  I saw on your website that you've successfully tested the
> USB2.0 IP core on a Xilinx Spartan 2 xc2s50-6. Where you able to test
> it on a whole system? What PHY IC did you use?

I used the ageere phy

>   Also, is it possible for you to provide the testbenches you used in
> verifying the core? Thanks.

Sorry I prefer not to make them available.

-- 
rudi               
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