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Re: [pci] do_reset task



You've used a blocking assignment in both cases now.
We used this kind of assignments because we wanted a reset to be active at
time 0, not at 0+delta. When leaving reset, we have synchronized it to the
clock edge and used non-blocking assignment, so that positive edges of reset
and clock don't happen simultaneously.
I don't think that anything would be wrong if we used non-blocking in both
cases.

Regards,
Miha Dolenc

----- Original Message -----
From: <pinhas.krengel@formalized.com>
To: <pci@opencores.org>
Sent: Friday, April 19, 2002 3:43 PM
Subject: [pci] do_reset task


> Why is reset asserted with blocking (reset = 1'b1 ;) and de-asserted with
non blocking (reset <= 1'b0 ;).
>
> I suggest using non blocking for both.
> task do_reset;
> begin
>     next_test_name[79:0] <= "Reset.....";
>
>     reset = 1'b1 ;
>     #100 ;
>     `ifdef HOST
>         @(posedge wb_clock) ;
>     `else
>     `ifdef GUEST
>         @(posedge pci_clock) ;
>     `endif
>     `endif
>
>     //by PK RV why is it a non-blocking
>     //reset <= 1'b0 ;
>     reset = 1'b0 ;
>
> end
> endtask
>
>
> --
> Best Regards,
>
> Pinhas Krengel
> Sr. ASIC / FPGA Engineer
> Formalized Design Alliance Partner
> 011 972-9-894-7865 Home Office
> 011 972-54-679-119 Portable
> 480-545-4555 Jim McHood, VP Engineering
> www.formalized.com
>
> --
>
>
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