[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[pci] about PCMCIA



I am now designing a 32-bit CardBus PC Card.

I don't know what kind of information should be stored in the address
offset which was defined in the CIS pointer.Maybe the baseaddress of 
images?

I want to know how to deal with the CIS pointer register in the header
of the configuration space,if the information of baseaddress,addressmask
,error control & status registers and interrupt control & status(defined
by myself)was located at the address offset begin at 0x100.
PS:the image to access the configuration space may be mapped to 
either memroy or IO .

THX!
--
To unsubscribe from pci mailing list please visit http://www.opencores.org/mailinglists.shtml