[pci] Bus command

[wilton@mail.usa.com]

Dear All,

I am a novice in RTL design and trying to understand the PCI bridge 
core. Could anyone here help me to understand the meaning of pre-
fetch, catchline, post write...? Under what circumstance shall they be 
implemented? I appreciate very much could anyone provide me any 
necessary information on it. 
Let's say if I'd like to implement an Ethernet MAC controller with PCI 
interface, shall I implement these stuff? 
BTW, Would anyone know where to get the MAC controller with PCI 
interface?

Awaiting your reply
with regards

Wilton
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