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Hello:
Why do the Instruction Cache Configuration Register
have a field containing the "Cache Write Stategy"? Does that mean that writing
in IC is allowed? If so, why don't you implement a Cache Block Flush Register
for instruction cache? I guess that CWS in ICCFGR is a typo in document, but I
would like to confirm it.
Thank you in advance.
Marķa Bolado
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