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Re: [openrisc] OR1200 simulation
Hi !
First, instruction address bus is iwb_adr_o, and after reset pulse it should start at 0x100 (the reset vector). Check out the or1k/orp. There you will find an example of SoC with the OR1200.
regards,
Damjan
On 21 Apr 2002 12:12 CET you wrote:
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> Dear ppl,
>
> I've downloaded the OR1200 core and am having problems simulating it in
> RTL.. I read in all the files.. no problems.. and I assign a clock to
> clk_i, iwb_clk_i, dwb_clk_i.. after a reset pulse is sent, the
> iwb_addr_o becomes 0x00000000.. but it doesn't change at all.. shouldn't
> the instruction PC move to the next instruction if the iwb_data_i is
> assigned 0x00000000?? According to the instruction set, 0x0 is a JUMP
> instruction.. so it should increment the address right?? I'm just
> curious if I'm doing this right..
>
> With Metta,
> Shawn Tan.
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> =ryc1
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