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Re: [openrisc] Re: PC as GPR?



Hi Andreas!

> > l.addi r7,r7,0x1234
> > l.jr r7
>
> I don't quite get your answer.  To clarify, I mean shared libraries like
> Linux has (and full Linux is a target for OR), they can be mapped at any
> address but they can not be relocated.  Therefore the code has to be
> position independent.
I am not pretty fammiliar with PIC. But I thought gcc and other utils create
global table where they read jump addresses from. So, would this be ok:

l.lwz r15, 0x1234(r16)
l.jr r15
l.nop

> ; save r15 again
> l.mfspr r15,r0,#SPR_PC
> l.add r15,r15,#GLOBAL_BASE-.
The jump you are reffering to would look like:
(16 bit rellocations are not supported right now, I think)

(in prolog)
l.mfspr r15,r0,SPR_NPC

(when doing a call)
l.movhi r7,hi(dest)
l.ori r7,r0,lo(dest)
l.add r15,r15,r7
l.jr r15
l.nop

> > > That would most likely be a language defined with SGML (or rather that
> > > newfangled XML, as more tools are likely available for it).  Could
also
> > > be (La)TeX, but HTML is harder to generate from that.
> > >
> > > There is DocBook (defined in SGML and XML), but that's more targeted
at
> > > software manuals.  Some templates would need to be defined for
> > > instruction descriptions, which could also be used to extract e.g.
> > > opcode tables from the manual.
> > Currenlty the ISA is generated. It goes like this:
> > gen_or1k_isa module (see or1k/gen_or1k_isa on CVS) generates  LaTeX
> > document,
> > it is converted to PS and then to html; it is then added to the word
> > document.
> > Maybe it would be nice if anybody could take some time and do a LaTeX
> > version
> > out of MS word - so that gen_or1k_isa package would generate whole or1k
> > document
> > to ps and pdf ?
>
> Oh, I have missed that, that's good.  So there is a usable format for
> instructions already.  Converting the rest of the doc to LaTeX sounds
> like the way to go then.  That should be some work, but not difficult
> (just copy text from Word file and add markup and tables again in TeX).
> It's just been some time since I did something in TeX last time...
:) great. This will help us a lot. The documentation cycle is annoyingly
long;
If you have some extra time it would be nice if you can read it through also
;)

> Yes, that is possible.  The missing multi register store/load still
> requires to save each register individually.  Subroutine calls are a quite
> common thing in the average code so this will create more pressure on
> memory bandwidth and instruction cache.
>
> Either a multi reg store would be appropriate or alternatively the
> register window approach used by some other RISC architectures.
True. But maybe it is a bit too late to change the architecture so
drastically - the SW would need major changes.

best regards,
Marko


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