CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 02/03/29 17:29:47 Modified files: xess/xsv_fpga/orp_soc/rtl/verilog/or1200: or1200_cpu.v Log message: Fixed some ports in instnatiations that were removed from the modules -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml