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[cvs-checkins] vga_lcd/rtl/verilog vga_wb_slave.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] vga_lcd/rtl/verilog vga_wb_slave.v
From: OpenCores CVS Agent <cvs-checkins-agent@opencores.org>
Date: Mon, 25 Feb 2002 07:13:45 +0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	vga_lcd
Changes by:	rherveille	02/02/25 07:13:45

Modified files:
	rtl/verilog    : vga_wb_slave.v 

Log message:
	Fixed dat_o incomplete sensitivity list.

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