Re: [oc] Modular FPGA board (PCI)

[Richard Herveille <richard@asics.ws>]

A few comments on this:

>Paul,
>
>Just to repeat my concern, 'standard' 33Mhz 32 bit slots in PC's use 5V
>signalling.
>
>The pci connector has a keyed section, which must mate up with a
>corresponding slot in the plug in card. This key slot can be in one of two
>positions (actually the connector is just rotated 180) which indicate
>whether the motherboard uses 5v or 3v3 signalling.  Many plug in pc cards
>are 'universal' which means they have two slots and can fit in any hole -
>this is possible by powering the ASIC's IO ring with the VIO supply on the
>PCI connector.
>This is not possible using virtex FPGA's as VCC_IO cannot be 5V.

Doesn't matter. As long as the IO's can handle the over-voltage. Some FPGAs 
use 3v3 IOrings, but have dedicated IOpads which can handle 5v signals. 
This is normally taken care of by terminating diodes in the IOpads.

>If you can guarantee the dev board will only go in 3v3 slots (and these are
>still quite rare) then everything will be fine.

Not true. PCI has set a course where eventually 5v devices won't be 
supported anymore, but there's still a long time to go. This means even 
though your board is a pure 3v3 design, PCI signals can still reach 5v. 
This is caused by other boards in the system (or even the system) which use 
5v output drivers.

>I'm not sure you can get away with external buffers around the FPGA for PCI.
>as was suggested :
>1, as the signals are bi-directional you would have terrible timing problems
>and two loads per net - which is illegal

Depends on what type of buffers you use. If you use bi-directional buffers 
you don't have the dual-load problem. Timing and trace-length is still a 
bitch though.

>2, the Virtex-1 devices have the correct diode termination in the IO cell
>for 3V3 and 5V PCI - you are not going to get that in a standard part.
>3, the track lenths from pci connector to fpga are tightly constrained -
>under 1.5 inches for 32 bit signals
>
>Sparten II devices are fine for the job, and a generic cheap PCI proto card
>sounds great !

This is probably the device you want to go for. Spartan-II devices are 
dead-cheap (at least compared to Virtex) and awesome fast.

Richard


>(sorry about the dual post, but I wasn't sure if you were reading the pci
>list)
>cheers,
>
>Mike.
>----- Original Message -----
>From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
>To: <cores@opencores.org>
>Sent: Monday, November 12, 2001 1:42 PM
>Subject: RE: [oc] Modular FPGA board (PCI)
>
>
>Mike,
>
>thanks, as my initial PCI core will be hosted in a PC, 5V support
>isn't a big concern at the moment. Once the core is working then it
>will be available for people to use on any chip they want. The
>Virtex-E board I'm using has the most I/O pins I can find on a
>'cheaper' development board. I intend to also design a 'generic
>PCI development board', I expect to use a Spartan II device
>(3.3v, 5v tolerant) on it. Hopefully the board with FPGA and
>support circuitry on it will be less than £50 ($75) thus  allowing
>more people can develop PCI projects. The PCI connector will be
>the 'standard PC' based PCI connector as I suspect most developers
>will have access to a PC but people can adjust the boards connector
>to suit their own needs.
>
>Paul
>
>-----Original Message-----
>From: owner-cores@opencores.org [mailto:owner-cores@opencores.org]On
>Behalf Of Mr mike johnson
>Sent: 12 November 2001 09:42
>To: cores@opencores.org
>Subject: [oc] Modular FPGA board (PCI)
>
>
>Chaps,
>
>Just to make sure you're aware that Virtex-E devices are NOT 5V
>tolerant, and should therefore not be used in a 33Mhz 5V PCI slot. This
>may not be an issue in embedded apps, but
>only Virtex (1) devices have the correct IO buffer for full spec
>compliance.
>
>If you look at the pci mail list theres a bit more discussion about
>this. I have had my VHDL core running in real hardware for a while, but
>I am trying to make a generic 64/66Mhz core with a seperate wishbone
>backend. Timing is hard to meet in a non-E device !
>
>Regards,
>Mike.
>
>John,
>
>I too am working on a PCI card controlled by a FPGA. My main
>consideration (apart from price) is how many I/O pins are left over
>after
>the 50 pins (includes _INTA). Theres nothing worse than finding a board
>
>that suits your requirements except it doesn't have enough I/O pins.
>I've ordered a PCI prototyping board and a FPGA development board
>(Virtex-E) which I will 'glue' together and develop my PCI core. I have
>a
>copy of the PCI 2.2 specs and a pretty good book called "PCI BUS
>Demystified by Doug Abbott" so I'm just waiting for my boards to arrive.
>
>My board will support full Initiator/Target functionality, probably
>will also
>support 66mhz (not 100mhz yet) but not 64bit (which should be easy
>enough to expand it to). Once my 'fudge board' works okay I'll get a
>board manufacturer to make me some alpha-test boards with the FPGA
>already mounted on them which will go out to my testers. Haven't
>enquired about the prices for manufacturing the boards yet so fingers
>crossed. The development platform & documentation costs are £260
>($400) which I think is quite for a PCI+FPGA development system. Sure
>beats the thousands of dollars some companies ask you for.
>
>Paul McFeeters
>
>----- Original Message -----
>From: John Dalton <johnd@s... >
>To: cores@o...
>Date: Fri, 24 Nov 2000 14:12:43 +1100
>Subject: Re: [oc] Modular FPGA board
>
> >
> >
> >
> > > Are you working in the development of the free PCI core?
> >
> > No.
> >
> > > My idea was the opposite of your: I was planning to
> > > built a board for PCI testing only when the core will be
> > finished.
> >
> > My plan is for the PCI hardware to be an FPGA connected directly
> > to a PCI connector.  There would also be a bunch of pins going off
> > to the
> > main FPGA.  The only questions are:
> > 1) How big an FPGA do you need, and
> > 2) How many pins do you need to communicate with the main FPGA?
> >
> > An answer to question 1) is not too important, as within a
> > family it is possible to get different sized FPGAs with a common
> > footprint.
> >
> > In a way, I think it is a good thing to design the PCI core and the
> > hardware
> > at the same time.  This forces the hardware and core to be
> > independent,
> > leading to maximum portability for the core and maximum versatility
> > for the hardware.
> >
> > > If a PCI core is validated through simulations and it doesn't
> > work over a
> > > specific board, what should I do to detect the problem?
> > Measurements using
> > > oscilloscopes and logical analysers are not possible, because
> > they modify
> > > the circuit when connected into them due to cable impedances,
> > that
> > > generates multiple reflection. Is there any solution?
> >
> > Since we are using programmable logic, it should be possible to use
> > the system
> > to validate itself.  Simply program a logic analyser into the FPGA.
> > One of the initial applications of the Pamette (an FPGA board built
> > bt Digital) was to verify the operation of a PCI bus to which it
> > was
> > connected.
> >
> > > I don't think that an FPGA for PCI have to fit in a socket.
> > IMHO, it has
> > > to be soldered in a board. And if this board should fit in a
> > SIMM socket,
> > > the FPGA has to be a TQFP or BGA packet.
> >
> > Agree.  My current thinking is to build the PCI as a separate
> > board,
> > with a chip soldered directly to it.  PCI tracks would go directly
> > to
> > a PCI connector.  The main logic board and PCI board would be
> > plugged into each other.  Unfortunately I don't think a SIMM socket
> > is possible due to mechanical constraints.
> >
> > > TO DO AT HOME??? Well, if I understood it right, it is much
> > harder to do
> > > the copper lines for the FPGA than for the edge connector.
> >
> > Yep.  Do at home.  I'm proposing to use CAD (ideally gpcb, but I
> > don't
> > think it is finished) to layout a board, printing it 1:1 then using
> > optical
> > means (Riston?) to transfer the design to a PCB.  With careful
> > construction
> > it *might* be possible to do a board for a chip with 0.5mm pins at
> > home.
> > In my experience, aligning two sides of a board, to a fraction of a
> > mm, is
> > difficult to do at home.  Hence it is difficult to do a double
> > sided
> > edge connector.  (Single sided is okay.)
> >
> > Of course this does not rule out the convenience of paying someone
> > to build the board for you.  But it would be nice to cater for all
> > tastes.
> >
> > > Is there any
> > > problem if the lines of the edge connector have the right
> > distance and
> > > smaller width (ie, increasing the spacing)?
> >
> > Probably not a good idea.  Edge connector widths and spacings have
> > generally been designed to maximise chances of a good connection
> > while minimising chances of a short between contacts.  Changing
> > widths could impact reliability.
> >
> > > Greetings from Brazil!
> >
> > G'day from Australia.
> >
> > John
> >
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